Seongju Kim

Seongju Kim

Mar 2025 - Aug 2025

  • Postdoctoral Researcher
  • UNIST Nanoelectronics and Advanced Packaging Lab (UNL) Postdoctoral Researcher, CP Team
  • Thermal Management of Advanced Packaging by Machine Learning

Current: Assistant Professor, Department of Creative Convergence Engineering, Hanbat National University

BIO

김성주 박사님은 우리 연구실이 UNIST에 자리하고 있던 시절인 2025년 3월부터 8월까지 박사후 연구원으로 함께한 소중한 인연입니다. 박사님의 주요 연구 분야는 머신러닝을 활용한 첨단 패키징의 열 관리였습니다. 연구실에 계시는 동안 김 박사님은 헌신적인 멘토로서 연구실 학생들과 적극적으로 소통하셨을 뿐만 아니라, '인공지능 기초 세미나'를 통해 구성원들에게 기초 개념을 가르쳐 주시는 등 본인의 전문 지식을 아낌없이 나누어 주셨습니다. 또한 여러 프로젝트에서 열 해석 및 시뮬레이션을 도맡아 진행하시며 연구실의 연구 스펙트럼을 넓히는 데 크게 기여하셨습니다. 뛰어난 연구 역량과 더불어 특유의 긍정적인 마인드와 따뜻한 친화력으로, 김성주 박사님께서는 주변 모든 사람에게 큰 힘이 되어 준 훌륭한 동료로 기억되고 있습니다.

Career

  • Assistant Professor / Department of Creative Convergence Engineering, Hanbat National University (Sep 2025 - present)
  • Postdoctoral Researcher / Department of Electrical Engineering, UNIST (Mar 2025 - Aug 2025)

Education

  • PhD / Department of Materials Science and Engineering, POSTECH (Sep 2022 - Feb 2025)
  • MS / Department of Mechanical Engineering, POSTECH (Mar 2018 - Feb 2020)
  • BS / Department of Mechanical Engineering, Ajou University (Mar 2011 - Feb 2018)

Publications in Lab

Journal

  1. Statistically resolving thickness-dependent electrical characteristics in multilayer-MoS2 transistors
    Co-author · Advanced Functional Materials (Early access), 2026
  2. 3D active-matrix multimodal sensors arrays for independent detection of pressure and temperature
    Co-author · Science Advances 11 (3), 2025
  3. Spatiotemporal measurement of arterial pulse waves enabled by wearable active-matrix pressure sensor arrays
    Co-author · ACS Nano 16 (1), 2022
  4. Parylene-based double-layer gate dielectrics for organic field-effect transistors
    Co-author · ACS Applied Materials & Interfaces 10 (44), 2018

Conference

  1. Vertical-die (V-die) 3.5D integration for cool ultrahigh-bandwidth memory systems
    Co-author · 2026 IEEE/JSAP Symposium on VLSI Technology and Circuits (Accepted)
  2. Microchannel-Embedded 3D-Printed Ceramic Substrates for Liquid-Cooled Power Module Packaging
    Co-author · 2026 76th Electronic Components and Technology Conference (ECTC)
  3. Active BSCDN benchmark framework with backside-compatible CNFET logic technology
    Co-author · 2025 71th IEEE International Electron Devices Meeting (IEDM)
  4. Monolithic 3D integration of III-V HEMTs on glass using ultra-thin dielectric bonding layer: A high-frequency and low-loss active glass platform for sub-THz applications
    Co-author · 2025 71th IEEE International Electron Devices Meeting (IEDM)
  5. Quasi-coaxial through-hole integrated additively manufactured antenna-in-package lid substrates
    Co-author · 2025 75th Electronic Components and Technology Conference (ECTC)
  6. 3D printed fanout interposer substrates with curved through-holes for rapid prototyping of advanced packaging
    Co-author · 2025 75th Electronic Components and Technology Conference (ECTC)